I2CChip.com: PIC MICRO I2C Slave Errata

If you are using a PIC as an I2C slave, read on....

Contents The standard PIC Micro slave I2C has a bug that can lock it up under certain conditions. This can affect I2C coprocessors that use picmicros.

This bug can occur in some unlikely special cases using repeated start. Normal use of the I2C-2-PC should not cause either of these.

So that you don't have a problem with it

  • Don't do a repeated start/read, with no data actually read between. ie S41 00 S41 00. There is no reason to do this anyway!
  • Send STOP at the end of transactions. Don't just leave the bus active for long periods. This is good practice and recommended anyway.
  • Check for timeouts on I2C slave co-processors. This is Microchips recommended way of dealing with the problem, so the manufacturers of these chips will start to include them.

If you think that the way you are using the I2C-2-PC/BL232 might mean very slow transactions, and there is a risk of timeouts, you can use the ":" PAUSE command. This makes the I2C-2-PC wait until it sees an EOL char, before executing the command. This way a whole command will be exectuted quickly, and cannot be paused part way through when Windows takes the PC over for a while. eg

:S40 FF P [LF]

waits until it gets the linefeed [LF] before executing the S40FFP

Dr Microchip writes in 80132b.pdf:

In its current implementation, the module may fail to correctly recognize certain Repeated START conditions.

For this discussion, a Repeated START is defined as a START condition presented to the bus after an initial valid START condition has been recognized and the START status bit(SSPSTAT:3) has been set, and before a valid STOP condition is received. If a Repeated START is not recognized, a loss of synchronization between the Master and Slave may occur; the condition may continue until the module is reset. A NACK condition, generated by the Slave for any reason, will not reset the module.

This failure has been observed only under two circumstances:

• A Repeated START occurs within the frame of a data or address byte. The unexpected START condition may be erroneously interpreted as a data bit, provided that the required conditions for setup and hold times are met.

• A Repeated START condition occurs between two back-to-back slave address matches in the same Slave, with the R/W bit set to Read (= 1} in both cases. (This circumstance is regarded as being unlikely in normal operation.)

See the errata sheet on any I2C slave capable PICMICRO

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